Silicon Photonics for High-Performance Computing and Beyond
- Length: 394 pages
- Edition: 1
- Language: English
- Publisher: CRC Press
- Publication Date: 2021-11-17
- ISBN-10: 0367262142
- ISBN-13: 9780367262143
- Sales Rank: #7503670 (See Top 100 Books)
Silicon photonics is beginning to play an important role in driving innovations in communication and computation for an increasing number of applications, from health care and biomedical sensors to autonomous driving, datacenter networking, and security. In recent years, there has been a significant amount of effort in industry and academia to innovate, design, develop, analyze, optimize, and fabricate systems employing silicon photonics, shaping the future of not only Datacom and telecom technology but also high-performance computing and emerging computing paradigms, such as optical computing and artificial intelligence. Different from existing books in this area, Silicon Photonics for High-Performance Computing and Beyond presents a comprehensive overview of the current state-of-the-art technology and research achievements in applying silicon photonics for communication and computation. It focuses on various design, development, and integration challenges, reviews the latest advances spanning materials, devices, circuits, systems, and applications.
Technical topics discussed in the book include:
- Requirements and the latest advances in high-performance computing systems
- Device- and system-level challenges and latest improvements to deploy silicon photonics in computing systems
- Novel design solutions and design automation techniques for silicon photonic integrated circuits
- Novel materials, devices, and photonic integrated circuits on silicon
- Emerging computing technologies and applications based on silicon photonics
Silicon Photonics for High-Performance Computing and Beyond presents a compilation of 19 outstanding contributions from academic and industry pioneers in the field. The selected contributions present insightful discussions and innovative approaches to understand current and future bottlenecks in high-performance computing systems and traditional computing platforms, and the promise of silicon photonics to address those challenges. It is ideal for researchers and engineers working in the photonics, electrical, and computer engineering industries as well as academic researchers and graduate students (M.S. and Ph.D.) in computer science and engineering, electronic and electrical engineering, applied physics, photonics, and optics.
Cover Half Title Title Page Copyright Page Contents Preface References Editors Contributors Section 1: High-Performance Computing Interconnect Requirements and Advances 1. Silicon Photonic Modulation for High-Performance Computing 1.1 Introduction 1.2 A Board Problem with an Optical Solution 1.3 Petabyte Optical Interconnection 1.4 Multiplexing 1.4.1 Time and Space Division Multiplexing 1.4.2 Wavelength Division Multiplexing 1.5 Generating Multiple Optical Carriers 1.5.1 Optical Spectral-Slicing 1.5.2 Noise in a Slice from an SLED 1.6 Optical Comb Generation 1.6.1 Properties of an Optical Comb 1.6.2 Generating Combs from Lasers and RF Sources 1.6.2.1 Single-Spaced Optical Frequency Comb Generators 1.6.2.2 Double-Spaced Comb Generation 1.6.3 General Model of a Comb Generator 1.7 Modeling a Transmitter in a High-Speed Optical Interconnection 1.8 Summary References 2. Laser Modulation Schemes for Minimizing Static Power Dissipation 2.1 Introduction 2.2 Pros and Cons of On-Chip Optical Networks 2.3 Background 2.3.1 Optical Devices 2.3.2 Optical Buses 2.4 Laser Modulation in CPUs 2.4.1 Probe 2.4.2 ColdBus 2.4.3 PShaRe 2.4.3.1 Basic Architecture 2.4.3.2 Prediction 2.4.3.3 Reconfiguring the Network 2.4.3.4 Tuning Network 2.4.4 BigBus 2.4.4.1 Architecture 2.4.4.2 Prediction 2.5 Laser Modulation in Multi-Socket Systems 2.6 Laser Modulation in GPUs 2.6.1 Architecture 2.6.2 Prediction Mechanism 2.6.3 Reconfiguration 2.7 Conclusion References 3. Scalable Low-Power High-Performance Optical Network for Rack-Scale Computers 3.1 Introduction 3.2 Related Work 3.3 Architecture 3.3.1 RSON Architecture Overview 3.3.2 FODON Switch Design 3.3.3 Preemptive Chain Feedback Control Scheme 3.4 Evaluations 3.4.1 Evaluation Setup and Methodology 3.4.2 Performance Evaluation 3.4.3 System Energy Consumption 3.4.4 Optical Energy Efficiency 3.4.5 System Performance per Energy 3.5 Conclusions References 4. Network-in-Package for Low-Power and High-Performance Computing 4.1 Data Movement in Advanced Computing Systems 4.2 Wideband Wireline Communications 4.3 Inter-symbol Interference 4.4 Choice of Signaling Method 4.5 OMWS 4.6 Transceiver Architecture 4.7 Analog Encoder and Decoder Circuits 4.8 OMWS Issues 4.9 Summary and the Future Directions Acknowledgment References Section II: Device- and System-Level Challenges and Improvements 5. System-Level Management of Silicon-Photonic Networks in 2.5D Systems 5.1 Introduction 5.2 Thermal and Process Sensitivities of Optical Devices 5.2.1 Thermal Variations (TV) Induced MRR Resonance Shifts 5.2.2 Process Variations (PV) Induced MRR Resonance Shifts 5.3 Device- and Design-Level Techniques to Mitigate MRR Resonance Shifts 5.3.1 Device-Level Techniques 5.3.2 Design-Level Techniques to Mitigate MRR Resonance Shifts 5.4 System-Level Management Techniques 5.5 Conclusion Acknowledgment References 6. Thermal Reliability and Communication Performance Co-optimization for WDM-Based Optical Networks-on-Chip 6.1 Introduction 6.2 Chapter Overview 6.3 Thermal Sensitivity of Micro-ring Resonators Under Wavelength Tuning Mechanism 6.4 PV-OTS: PV-Tolerant Optical Temperature Sensor 6.5 Thermal Reliable ONoCs 6.5.1 Methods for Reliable Optical Communication 6.5.2 Routing Criterion: I/L/Z-Shaped Routing Path 6.6 Conflict-Avoidance Routing Approaches 6.6.1 Problem Formulation 6.6.1.1 Communication in ONoC 6.6.1.2 Problem Definition 6.6.2 MILP-Based Routing Approach 6.6.3 Conflict-Aware Routing Heuristic Algorithm 6.7 Performance Evaluation 6.7.1 Accuracy of the Thermal Sensitivity Model 6.7.2 Performance of the PV-OTS Design 6.7.3 Effectiveness of Our Routing Approaches 6.8 Conclusion Acknowledgment References 7. Exploring Aging Effects in Photonic Interconnects for High-Performance Manycore Architectures 7.1 Introduction 7.2 VBTI Aging in Microrings (MRs) 7.2.1 Analytical Models for VBTI Aging Mechanism 7.3 Impacts of VBTI Aging 7.3.1 Impacts of VBTI Aging on MRs' Resonance Characteristics 7.3.2 Impacts of VBTI Aging on DWDM-Based OOK Links 7.3.2.1 VBTI Aging in Modulator MRs of Source Node 7.3.2.2 VBTI Aging in Receiver MRs of Destination Node 7.4 Mitigating the Impacts of VBTI Aging 7.4.1 Reactive Mitigation of VBTI Aging Impacts 7.4.2 4-PAM Signaling: A Technique for Proactive Mitigation of VBTI Aging Impacts 7.5 Evaluation 7.5.1 CLOS PNoC Architecture 7.5.2 Evaluation Setup 7.5.3 Modeling of Fabrication Process Variations in MRs 7.5.4 Modeling of Signal Degradation-Related Power Penalty 7.5.5 Evaluation Results 7.6 Conclusions References 8. Improving Energy Efficiency in Silicon Photonic Networks-on-Chip with Approximation Techniques 8.1 Introduction 8.2 Related Work 8.3 Background: Floating Point Format 8.4 Lorax Framework: Overview 8.4.1 Loss-Aware Laser Power Management 8.4.2 Integrating Multilevel Signaling for Approximation 8.5 Experiments 8.5.1 Experimental Setup 8.5.2 Application-Specific Approximation Sensitivity Analysis 8.5.3 Comparative Results for Laser Power and EPB 8.6 Conclusions References Section III: Novel Design Solutions and Automation 9. Automated, Scalable Silicon Photonics Design and Verification 9.1 History/Context of Traditional IC Design and Fabless Model 9.2 Process Design Kits 9.3 Electronic PDKs 9.3.1 Layer Map 9.3.2 Characterized Devices/Device Models and Symbols 9.3.3 Pre-characterized Cells 9.3.4 Intellectual Property 9.3.5 Design Rules and Technology Files 9.4 Physical and Electrical Verification 9.4.1 Design Rule Checking 9.4.2 Layout vs. Schematic Verification 9.4.3 Antenna Checks 9.4.4 Parasitic Extraction 9.4.5 Electrical Rule and Reliability Checking 9.4.6 Design for Manufacturing 9.5 A PDK for Integrated Silicon Photonics 9.5.1 Pre-characterized Devices 9.5.2 Layout Implementation 9.6 Automated Photonics Design Methodologies 9.6.1 Layout-Centric Design 9.6.2 Schematic-Based Design 9.6.3 Schematic-Driven Layout 9.6.4 Automated Layout 9.6.4.1 Scripted 9.6.4.2 Schematic-Driven 9.6.4.3 Test Chip 9.7 Silicon Photonics Verification 9.8 PIC Physical Layout Verification 9.9 Best Practices for Photonics DRC 9.10 PIC LVS Verification 9.11 Best Practices for Photonics LVS 9.12 Litho-Friendly Design Simulation 9.13 Conclusion References 10. Inverse-Design for High-Performance Computing Photonics 10.1 System-Level Motivation 10.2 Components of an Optical Interconnect 10.3 Inverse-Design Method Formulation 10.4 Practical Photonic Devices with Inverse-Design 10.5 Outlook of Inverse-Design for High-Performance Computing References Appendices A10.1 Estimation of Optical Interconnect System-Level Benefit A10.1.1 Memory System Analysis A10.1.2 LSTM Application System Analysis A10.2 Adjoint Method Derivation 11. Efficiency-Oriented Design Automation Methods for Wavelength-Routed Optical Network-on-Chip 11.1 Introduction 11.2 WRONoC Design Criteria 11.2.1 Common Setting and General Design Rules 11.2.2 Wavelength Usage 11.2.3 MRR Usage 11.3 Design Automation for WRONoCs 11.3.1 Necessity of Efficient Design Automation Methods for WRONoCs 11.3.2 Subtraction from Fully Connected Router 11.3.3 Template-Based Synthesis 11.4 Conclusion References Section IV: Novel Materials, Devices, and Photonic Integrated Circuits 12. Innovative DWDM Silicon Photonics for High- Performance Computing 12.1 Introduction 12.2 Integrated Dense Wavelength Division Multiplexing Architecture 12.3 Advanced Silicon Photonic Building Blocks 12.3.1 Multi-Wavelength Lasers 12.3.2 Efficient Phase Tuner and Modulators 12.3.3 Robust Si-Ge Avalanche Photodetectors 12.3.4 High-Gain Heterogeneous Quantum-Dot Avalanche Photodetectors 12.4 Innovative Integration Platform Development 12.5 Advanced Wafer-Level Testing and Analysis 12.6 Novel Fiber Attachment Solution 12.7 Summary References 13. Silicon Photonic Bragg Grating Devices 13.1 Introduction 13.2 Integrated Waveguides Bragg Gratings 13.2.1 Bragg Gratings Theory 13.2.2 Bragg Gratings Design and Fabrication 13.2.2.1 Manufacturing Variability 13.2.2.2 Lithography Effects 13.2.3 Applications of Bragg Gratings 13.2.3.1 Hybrid-Integrated Lasers 13.2.3.2 Biosensors 13.2.3.3 Dispersion Compensation 13.3 Contra-Directional Couplers 13.3.1 Contra-Directional Couplers' Theory 13.3.2 Applications of Contra-Directional Couplers 13.3.2.1 Wavelength-Division-(de)-Multiplexer 13.3.2.2 Broadband Optical Add-Drop (de)-Multiplexers 13.4 Conclusion Acknowledgments References 14. Silicon Photonic Integrated Circuits for OAM Generation and Multiplexing 14.1 Introduction 14.2 Grating-Assisted Ring-Resonators 14.2.1 Principle 14.2.2 Demonstrations 14.3 Phased Antenna Arrays 14.3.1 Principle 14.3.2 Generating Circularly Polarized OAM Modes 14.3.3 Free-Space Propagation 14.3.4 Demonstrations 14.4 In-Plane Mode Convertor 14.5 Waveguide Surface Holographic Gratings 14.6 Challenges and Outlook References 15. Novel Materials for Active Silicon Photonics 15.1 Motivation and Overview 15.1.1 Active Silicon Photonics 15.1.2 Overview of the Chapter 15.2 Barium Titanate Electro-Optic Modulators 15.2.1 Electro-Optic Properties of BaTiO3 15.2.1.1 Electro-Optic Coefficients 15.2.1.2 Multi-Domain Structure 15.2.2 The Waveguide Design: Partially Etched Horizontal Slot Waveguides 15.2.2.1 Design of the Horizontal Slot Waveguides 15.2.2.2 On-Chip Grating Couplers 15.2.2.3 Mach-Zehnder Interferometers 15.2.2.4 Optical Resonators 15.2.3 Theoretical Considerations of BTO Modulators 15.2.3.1 Transmission Loss 15.2.3.2 Absorption Loss From the Gold Electrodes 15.2.3.3 Bend Loss 15.2.4 Electro-Optical Properties 15.2.4.1 Dependence of the Δn on the Waveguide Width 15.2.4.2 Dependence of the Δn on the Thickness of the BTO Layer 15.2.4.3 Dependence of the Δn on the Thickness of the Poly-Silicon Layer 15.2.5 Material Growth, Characterization and Device Fabrication 15.2.5.1 Epitaxial Growth 15.2.5.2 Oxygen Annealing 15.2.5.3 Device Fabrication 15.2.6 Experimental Results 15.2.6.1 Grating Couplers 15.2.6.2 Micro-Ring Resonators 15.2.6.3 Mach-Zehnder Interferometers 15.2.6.4 Frequency Response of the BTO Electro-Optic Modulators 15.2.7 Summary 15.3 Integrated Photonic Circuits in Gallium Nitride and Aluminum Nitride 15.3.1 Group III-Nitride Semiconductors as Optical Materials 15.3.2 Harmonic Generation in GaN Photonic Circuits 15.3.2.1 GaN Photonic Circuits 15.3.2.2 Second and Third Harmonic Generation from GaN Photonic Circuits 15.3.3 AlN Photonic Circuits and Electro-Optic Modulators 15.3.3.1 AlN Photonic Circuits 15.3.3.2 AlN Microring Electro-Optic Modulators 15.3.3.3 Slow Light in AlN 2D Photonic Crystals 15.3.3.4 AlN One-Dimensional Nanobeam Photonic Crystal Cavity 15.4 Chapter Summary References Section V: Emerging Computing Technologies and Applications 16. Neuromorphic Silicon Photonics 16.1 Introduction 16.2 Silicon Photonic Neurons 16.2.1 Multiply-Accumulate Operation 16.2.2 Nonlinear Transformation 16.3 Silicon Photonic Neural Networks and Applications 16.3.1 Application I: Neural ODE Solver 16.3.2 Application II: Nonlinear Programming and Model-Predictive Control 16.3.3 Application III: Intelligent Signal Processing 16.4 Conclusion and Future Directions References 17. Logic Computing and Neural Network on Photonic Integrated Circuit 17.1 Introduction of Optical Computing 17.2 Optical Logic Synthesis 17.2.1 Optimization Techniques 17.2.2 Simulation Results 17.3 Exploiting Waveguide Division Multiplexing 17.3.1 Proposed Synthesis Flow 17.3.2 Simulation Results 17.4 Area-Efficient Optical Neural Networks 17.4.1 Background of Optical Neural Networks 17.4.2 Slimmed Optical Neural Network 17.4.3 Simulation Results 17.5 Conclusion and Future Directions References 18. High-Performance Programmable MZI-Based Optical Processors 18.1 Introduction and Motivation 18.2 Theory and Analysis 18.2.1 2 × 2 Reconfigurable MZI 18.3 4 × 4 Reck MZI-Based Optical Processor 18.3.1 Programming the 4 × 4 Reck-Based Optical Processor 18.3.2 An Example for the Decomposition of an Arbitrary Unitary Transformation Matrix U(4) 18.4 The Diamond Mesh, a Phase-Error- and Loss-Tolerant MZI-Based Optical Processor for ONNs 18.4.1 Diamond Topology and Its Programming Process 18.4.2 Optical Neural Networks for Classification 18.4.3 4 × 4 Diamond-Topology- and Reck-Topology-Based Single Layer ONNs 18.4.4 Scalability Investigation of the Reck and Diamond Topologies in Single Layer ONNs 18.5 Conclusion References 19. High-Performance Deep Learning Acceleration with Silicon Photonics 19.1 Introduction 19.2 Related Work 19.3 Noncoherent Photonic Computation Overview 19.4 CrossLight Architecture 19.4.1 MR Device Engineering and Fabrication 19.4.2 Tuning Circuit Design 19.4.3 Architecture Design 19.4.3.1 Decomposition Vector in CONV/FC Layers 19.4.3.2 Vector Dot Product (VDP) Unit Design 19.4.3.3 Optical Wavelength Reuse in VDP Units 19.5 Evaluation and Simulation Setup 19.5.1 Simulation Setup 19.5.2 Results: CrossLight Resolution Analysis 19.5.3 Results: CrossLight Sensitivity Analysis 19.5.4 Results: Comparison with State-of-the-Art Accelerators 19.6 Conclusion References Index
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